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According to AnandTech, samsung's 5LPE(5 nm low power early) process has already certified Cadence and Synopsys full-flow tools, and its 5LPE process will use extremely ultraviolet lithography (EUV) technology.
Samsung fab has certified Synopsys fusion design platform for the 5LPE process and Cadence full-flow digital solutions full-flow design tools using the Arm cortex-a53 and Arm cortex-a57 cores.The certification means that these tools can meet samsung's requirements, and by using them, chip designers can give the 5LPE process the best power, performance and size (PPA) advantage.
Samsung's 5LPE process relies on FinFET transistors with the new standard cell architecture and USES DUV and EUV step-scan systems.And all of samsung's 7nm patents can be applied to 5LPE.As a result, the transition to 5LPE for 7nm customers will significantly reduce costs, and the pre-proven design ecosystem will shorten the development time of their 5LPE products.
Compared with the 7LPP, the 5LPE's "logical efficiency" is 25 percent higher, and chip developers can reduce the power consumption of chip designs by 20 percent, or improve performance by 10 percent.
The samsung-certified Candence and Synopsys toolset includes compilers, validators, power circuit optimizers, and EUV proprietary tools.
The 5LPE, which has more EUV layers than the 7LPP process, is expected to be used at samsung's upcoming EUV plant in huateng.The production line, expected to cost 6 trillion won ($4.615 billion), will be completed this year and begin mass production next year.
In particular, samsung's rival TSMC has announced plans to begin mass production of its 5nm process in the first quarter of 2020.Samsung is also working to mass-produce its 5nm process next year
